[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Cryptography] Does RISC V solve Spectre ?
- From: Tom Mitchell <mitch AT niftyegg.com>
- Subject: Re: [Cryptography] Does RISC V solve Spectre ?
- Date: Fri, 23 Mar 2018 19:09:15 -0700
- Arc-authentication-results: i=1; mx.google.com; dkim=neutral (body hash did not verify) firstname.lastname@example.org header.s=20150623 header.b=C9LvQ+Sa; spf=pass (google.com: best guess record for domain of cryptography-bounces+ben=bentasker.co.uk AT metzdowd.com designates 220.127.116.11 as permitted sender) smtp.mailfrom=cryptography-bounces+ben=bentasker.co.uk AT metzdowd.com
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:to:message-id:date:from:references:in-reply-to :mime-version:dkim-signature:delivered-to:arc-authentication-results; bh=ZC2AXeFnQw1GaV9i6P8lAqA/Obj3/gOw5c2olfE0ZSM=; b=x/uDJT9NACHFiJ9FdnpL3djCNQLdtwLU4wvoSsDD+Xzb+GwwSxohKZ3+OlmlluqWbN pVixIlaqAqyQqwbGmSfKVkVeY2RicQn3M9VZn3Okf+5dNGfkfvMmq2g8x4pdwNn6D83v aexJxMipg8pHcHi00fDZt/nc79HMoFzy2zJ1s9MrvcWZkfL93WAwI7X5ZlPXqzxZLUYt cSzRdYi0XkRi/pnV6t25PAli7LeiBB64RT62QqB8GwcPPl17jhP2IeoRvFIplpoQDmCl 1f6PQnowk5RUMqeO+Gdsh7itXPBM2hDEFxS6G0Mk8fnW3p2xoemI107gH5B+2qjsABij kCZQ==
- Arc-seal: i=1; a=rsa-sha256; t=1521858838; cv=none; d=google.com; s=arc-20160816; b=WROz+c/pSMaiJgANidiGNWKutX3PJ4axAV9oqvwpfLvxpy1YgZr+6plBe6OnEkl7Sp /huieENwh2KpGQPSCQQTGlAAugXrCbN7vCN94tcZJS1oRL0KmpaB5YQZ61O4cn/aIZu1 NHgq4kXdOIOCJboc3ZKiHtWo7yH1cGuXFYBNakrFQCWOcEE/KlVd1HN5j6z4/5jDsJUM 6AcXJmzy3y0Awx/Acs9aB0lhPmw3+9Q281vYsRo6lN6JA65ykM5U2F1g6zxMoSZ1o1aQ JG7HEYBA/5Wtp88su/9Gk2DqciUqhRr6JI5VEw3u9dt6d7cTfempjWaYdHNaJGJO+gSf ixjw==
- Cc: Crypto <cryptography AT metzdowd.com>
- List-archive: <http://www.metzdowd.com/pipermail/cryptography/>
- Sender: "cryptography" <cryptography-bounces+ben=bentasker.co.uk AT metzdowd.com>
- To: Ray Dillinger <bear AT sonic.net>
On Fri, Mar 23, 2018 at 4:19 PM, Ray Dillinger <bear AT sonic.net> wrote:
> Shouldn't all of that stuff be in the compilers, where it can be done
> ahead of time
This is in part what the VLIW designs wanted to do.
The folks I know that worked on MultiFlow say this is hard as heck.
A VLIW machine needs very wide data paths for instructions. <---
Important... system design not ISA.
Also the internals of modern machines are a hybrid of RISC and
very long instruction hardware. The decoder triggers microcode from
the external instruction set.
It may be that the internals could be microcoded to a safer but not
x86-64 instruction set. To my knowledge none of the fast x86-64 hardware
folk have disclosed their micro code, microinstruction hardware and the limits
that it can be tinkered with.
x86-64 has a lot of instructions and by killing some or so hobbling them
the compiler folk could revisit their code generation and still have processes
run close to the current speed.
The VAX had microcode.
The 68000 and 68010 had microcode that was on a hard wired ROM.
Some "big boys" burned their own magical 68000 microcode for special purposes.
I suspect there are others...
T o m M i t c h e l l
The cryptography mailing list
cryptography AT metzdowd.com